Appendix — Processing Model

Appendix to: AEON Specification v1

Status: decision-needed for consolidated v1

Canonical topic owners: ../AEON-spec-v1.md, ../AEOS-spec-v1.md

This appendix predates the v1 phase-boundary cleanup and must not be treated as the primary authority for current phase ownership. If this appendix conflicts with the canonical v1 spec set, the canonical v1 spec set wins.

This appendix defines AEON's normative processing phases, Assignment Events, Processor Registry, and v1 updates for tuple/indexed-path support and annotation stream emission.

[!IMPORTANT] v1 Baseline Additions New in v1 baseline: Tuple literal parsing (TupleLiteral), indexed path segment assignment ([n]), annotation stream record emission, reference resolution for indexed targets. Gated: These additions are part of the consolidated v1 baseline unless otherwise profile-gated.

1. Processing Phases

Implementations MUST follow the behavior of these conceptual phases:

2. Assignment Events

2.1 Definition

An Assignment Event is a normalized record emitted for each binding.

2.2 Required Fields

2.3 Optional Fields

2.4 Example

Assignment Event:

2.5 Tuple Example (v1 baseline)

Assignment Events:

Element sub-events (if emitting per-element events):

3. Uniqueness (Const Semantics)

AEON documents are immutable by construction:

• For any canonical path, there MUST be at most one Assignment Event
• Duplicate path bindings MUST raise an error
• No implicit override, merge, or replacement semantics

4. Annotation Stream Emission (v1 baseline)

Annotation stream records are emitted in Phase 4, in parallel with Assignment Events. They do NOT appear in the AES.

See Appendix: Annotation Stream for record format and binding rules.

Key invariants:

• Annotation stream emission MUST NOT affect AES contents
• AES with all comments stripped MUST equal AES with comments present
• Annotation stream records are source-ordered

5. Processor Registry

5.1 Definition

A Processor is a deterministic transformation function applied to Assignment Events.

5.2 Design Principles

1. No implicit execution — Documents cannot invoke processors directly
2. Profile-scoped authority — Only the active profile enables processors
3. Determinism — Same input produces identical output
4. No structural mutation — Processors cannot add/remove nodes
5. Explicit phase boundary — Processors run in Phase 5 only

5.3 Processor Binding

Profiles declare processors bound to:

• Datatype hints (e.g., point → geom.point)
• Annotation keys (e.g., style:color → core.hex)
• Canonical paths

5.4 Invocation

During Phase 5, for each Assignment Event:

1. Profile determines applicable processors
2. Processors invoked in deterministic order
3. Each processor receives the event and current value
4. Processor may validate, transform, or attach metadata

5.5 Processor Input

Processors receive:

• path — canonical path
• value — current value (may be ListNode or TupleLiteral in v1)
• datatype — if present
• annotations — if present

5.6 Processor Output

Processors MAY:

• Return a transformed value
• Return the same value unchanged
• Raise a validation error

Processors MUST NOT:

• Return multiple values
• Alter the canonical path
• Emit new Assignment Events

6. Reference Evaluation Phase

6.1 Binding Visibility Rule

A binding becomes eligible as a reference target only after its Assignment Event has been committed.

Self-references (e.g., a = ~a) are therefore invalid.

6.2 No Forward References

References MUST target paths already bound earlier in the document.

The no-forward rule applies independently per namespace (data and attribute).

6.3 Indexed Reference Targets (v1 baseline)

In v1 mode, references may target indexed paths:

Resolution proceeds using the same no-forward rule (referenced indexed path must be already bound).

6.4 Resolution Semantics

6.5 Cycles

Because AEON forbids forward references, cycles are unrepresentable.

7. Error Reporting

All errors MUST reference:

• Canonical path
• Span (when available)
• Phase where error occurred

Example:

End of Processing Model — v1